Bias switch circuit for compensating frontend offset of high accuracy measurement circuit
US10826449B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2019 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | May 12, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45614
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed is a high accurate measurement circuit, and the feature is using bias switching circuit for compensating front end offset, and the back end offset of amplifier is also cancelled. In the real measurement environment, offset exists in the amplifier of the measurement circuit has, and non-ideal effects also exist in the interface between measurement terminal and the measurement circuit, such as leakage current of chip package pins or mismatch of the circuit. The above non-ideal effects belong to front end offset and cannot be compensated by the prior arts. The disclosed structure uses the bias switch circuit and uses different switching method in the two measurement timings. By subtracting the measurement results for the two measurement timings, the front end offset is compensated, and the back end offset of the amplifier is also cancelled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.