Hung-Wei Chen
90Patents
12h-index
104Co-inventors
87Inventor score
Filing activity: Jul 2, 1997 → Jan 16, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7425740B2 | Method and structure for a 1T-RAM bit cell and macro | Electricity | 253 | Active |
| US7176522B2 | Semiconductor device having high drive current and method of manufacturing thereof | Electricity | 110 | Expired |
| US7452778B2 | Semiconductor nano-wire devices and methods of fabrication | Electricity | 86 | Expired |
| US7208815B2 | CMOS logic gate fabricated on hybrid crystal orientations and method of forming thereof | Electricity | 34 | Expired |
| US7205601B2 | FinFET split gate EEPROM structure and method of its fabrication | Electricity | 26 | Expired |
| US7611938B2 | Semiconductor device having high drive current and method of manufacture therefor | Electricity | 23 | Active |
| US7355262B2 | Diffusion topography engineering for high performance CMOS fabrication | Electricity | 21 | Expired |
| US7381649B2 | Structure for a multiple-gate FET device and a method for its fabrication | Electricity | 20 | Expired |
| US6439611B1 | File folder, box and panel designed with pre-perforated holes, grooves and slots | Performing Operations; Transporting | 16 | Expired |
| US7538351B2 | Method for forming an SOI structure with improved carrier mobility and ESD protection | Electricity | 14 | Expired |
| US6691376B1 | Firmly secured paper clip | Emerging Cross-Sectional Technologies | 13 | Expired |
| US7074692B2 | Method for reducing a short channel effect for NMOS devices in SOI circuits | Electricity | 13 | Expired |
| US7105897B2 | Semiconductor structure and method for integrating SOI devices and bulk devices | Electricity | 12 | Expired |
| US9463463B2 | Glucose test device | Performing Operations; Transporting | 12 | Active |
| US6955955B2 | STI liner for SOI structure | Electricity | 11 | Expired |
| US7737532B2 | Hybrid Schottky source-drain CMOS for high mobility and low barrier | Electricity | 10 | Active |
| US11239646B1 | Cable management structure applied in table | Human Necessities | 7 | Active |
| US7319258B2 | Semiconductor-on-insulator chip with<100>-oriented transistors | Electricity | 6 | Expired |
| US8426298B2 | CMOS devices with Schottky source and drain regions | Electricity | 6 | Active |
| US8466505B2 | Multi-level flash memory cell capable of fast programming | Electricity | 5 | Active |
| USRE45165E1 | Structure for a multiple-gate FET device and a method for its fabrication | General | 4 | Active |
| US6026676A | Method of determining a glide avalanche break point of a magnetic recording medium | Physics | 4 | Expired |
| US7466008B2 | BiCMOS performance enhancement by mechanical uniaxial strain and methods of manufacture | Electricity | 4 | Active |
| US7569896B2 | Transistors with stressed channels | Electricity | 4 | Active |
| US10523002B2 | Electrostatic discharge protection circuit | Electricity | 4 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.