Patent · US Active

Hardware apparatus to measure memory locality

US10831493B2 · kind B2 · utility

0Cited by
5References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 14, 2018
Grant dateNov 10, 2020
Priority date
Expiry dateMay 5, 2039

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2201/88
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A buffer is configured to store a plurality of last addresses accessed by a processor core from a memory. A minimum distance extraction circuit determines distances of a current memory address accessed by the processor core from each of the plurality of last addresses in the buffer and determines a minimum distance from the distances. A limit determination circuit compares the minimum distance to each of a plurality of ranges of distances and selects a range of the plurality of ranges within which the minimum distance falls. Each of a plurality of counters of a counter circuit is associated with a corresponding one of the plurality of ranges. A counter of the plurality of counters is to be incremented corresponding to the selected range.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.