Method for direct forming stressor, semiconductor device having stressor, and method for forming the same
US10832957B2 · kind B2 · utility
1Cited by
6References
20Claims
0Family size
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Key dates
| Filing date | Dec 12, 2019 |
| Grant date | Nov 10, 2020 |
| Priority date | — |
| Expiry date | Dec 12, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26513
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a semiconductor fin protruding from a substrate, a gate electrode over the semiconductor fin, a gate insulating layer between the semiconductor fin and the gate electrode, source and drain regions disposed on opposite sides of the semiconductor fin, a first stressor formed in a region between the source and drain regions. The first stressor is a grading strained stressor including multiple graded portions formed at graded depths. The first stressor is configured to create one of a graded compressive stress or a graded tensile stress.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.