3DIC interconnect apparatus and method
US10840287B2 · kind B2 · utility
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2References
20Claims
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Assignee
Inventors
Key dates
| Filing date | Jul 22, 2019 |
| Grant date | Nov 17, 2020 |
| Priority date | — |
| Expiry date | Jul 22, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/10253
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interconnect apparatus and a method of forming the interconnect apparatus is provided. Two substrates, such as wafers, dies, or a wafer and a die, are bonded together. A first mask is used to form a first opening extending partially to an interconnect formed on the first wafer. A dielectric liner is formed, and then another etch process is performed using the same mask. The etch process continues to expose interconnects formed on the first substrate and the second substrate. The opening is filled with a conductive material to form a conductive plug.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.