Digital measurement circuit and memory system using the same
US10840896B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2018 |
| Grant date | Nov 17, 2020 |
| Priority date | — |
| Expiry date | Jul 16, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/135
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A digital measurement circuit includes a first input flip-flop which receives a first signal through a data input terminal, receives a first clock signal through a clock input terminal, and outputs a second signal; a second input flip-flop which receives the second signal through a data input terminal, receives a second clock signal, which is an inverted signal of the first clock signal, through a clock input terminal, and outputs a third signal; and a delay line which receives the second signal and outputs first through n-th output signals, wherein n is an integer greater than one, and the first through n-th output signals are sampled based on the third signal to output first through n-th sampling signals is provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.