Memory system utilizing heterogeneous magnetic tunnel junction types in a single chip
US10847198B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2018 |
| Grant date | Nov 24, 2020 |
| Priority date | — |
| Expiry date | Nov 1, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/80
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A magnetic data recording system utilizing different magnetic memory element types to optimize competing performance parameters in a common memory chip. The memory system includes a first memory portion which can be a main memory and which includes magnetic memory elements of a first type, and a second memory region which can be a temporary memory region and which includes magnetic memory elements of a second type. A memory controller can be provided for controlling the input and retrieval of data to and from the first and second memory elements. The second, memory region can be a scratchpad memory or could also be cache type memory. The first type of magnetic memory elements can be designed for high data retention, whereas the second type of magnetic memory elements can be designed for fast write speed (low latency) and low write power consumption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.