Patent · US Active

Low voltage bit-cell

US10847214B2 · kind B2 · utility

4Cited by

1References

20Claims

0Family size

Assignee

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

Mahmut Sinangil · Campbell, US
Hung-Jen Liao · Hsinchu, TW
Jonathan Tsung-Yung Chang · Hsinchu, TW
Yen-Huei Chen · Hengshan, TW
Yen-Ting Lin · Hsinchu, TW

Key dates

Filing date	Sep 21, 2018
Grant date	Nov 24, 2020
Priority date	—
Expiry date	Sep 21, 2038

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/413
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Systems and methods for a bit-cell are presented. The bit-cell comprises a read-port circuit and a write-port circuit. The read-port circuit comprises four transistors, wherein the read-port circuit is activated by a first threshold voltage. The write-port circuit comprises eight transistors, wherein the write-port circuit is activated by a second threshold voltage. The write-port circuit is coupled to the read-port circuit. The first threshold voltage and the second threshold voltage may be different and may be provided by a single supply voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.