Lead frame with selective patterned plating
US10847449B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2019 |
| Grant date | Nov 24, 2020 |
| Priority date | — |
| Expiry date | Mar 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A copper lead frame used in the assembly of a semiconductor device includes a die flag and lead fingers extending away from the die flag. Each lead finger has a proximal end near the die flag and a distal end further away from the die flag. Metal plating is formed on the lead fingers, where first lead fingers have the metal plating on their proximal ends and second lead fingers have the metal plating on their distal ends. The first and second lead fingers are arranged alternately around the die flag.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.