Semiconductor package and electromagnetic interference shielding structure for the same
US10847474B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 2019 |
| Grant date | Nov 24, 2020 |
| Priority date | — |
| Expiry date | May 6, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a connection structure including one or more redistribution layers, a semiconductor chip disposed on the connection structure and electrically connected to the one or more redistribution layers, an encapsulant disposed on the connection structure and covering at least a portion of the semiconductor chip, and a shielding structure covering at least a portion of the encapsulant. The shielding structure includes a conductive pattern layer having a plurality of openings, a first metal layer covering the conductive pattern layer and extending across the plurality of openings, and a second metal layer covering the first metal layer. The second metal layer has a thickness greater than a thickness of the first metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.