Semiconductor device having low-k spacer and method for fabricating the same
US10847519B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 2018 |
| Grant date | Nov 24, 2020 |
| Priority date | — |
| Expiry date | May 10, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/315
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor device includes forming a line structure including a first contact plug on a semiconductor substrate and a conductive line on the first contact plug, forming a low-k layer having a first low-k, which covers a top surface and side walls of the line structure, performing a converting process on the low-k layer to form a non-converting portion adjacent to side walls of the first contact plug and maintains the first low-k and a converting portion adjacent to side walls of the conductive line and having a second low-k that is lower than the first low-k, and forming a second contact plug which is adjacent to the first contact plug with the non-converting portion therebetween while being adjacent to the conductive line with the converting portion therebetween.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.