Semiconductor device and method
US10847637B2 · kind B2 · utility
2Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2019 |
| Grant date | Nov 24, 2020 |
| Priority date | — |
| Expiry date | Apr 29, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes forming a dummy gate structure over a semiconductor fin, forming a dielectric layer on opposing sides of the dummy gate structure, and removing the dummy gate structure to form a recess in the dielectric layer. The method further includes forming a gate dielectric layer and at least one conductive layer successively over sidewalls and a bottom of the recess, and treating the gate dielectric layer and the at least one conductive layer with a chemical containing fluoride (F).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.