Electromigration resistant and profile consistent contact arrays

US10854541B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Srinivas V. Pietambaram · Gilbert, US
• Jung Kyu Han · Chandler, US
• Ali Lehaf · Phoenix, US
• Steve Cho · Chandler, US
• Thomas HEATON · Mesa, US
• Hiroki Tanaka · Osaka, JP
• Kristof Darmawikarta · Chandler, US
• Robert Alan May · Chandler, US
• Sri Ranga Sai Boyapati · Chandler, US

Key dates

• Filing date: Aug 28, 2019
• Grant date: Dec 1, 2020
• Expiry date: Aug 28, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/3651
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A package assembly includes a substrate and at least a first die having a first contact array and a second contact array. First and second via assemblies are respectively coupled with the first and second contact arrays. Each of the first and second via assemblies includes a base pad, a cap assembly, and a via therebetween. One or more of the cap assembly or the via includes an electromigration resistant material to isolate each of the base pad and the cap assembly. Each first cap assembly and via of the first via assemblies has a first assembly profile less than a second assembly profile of each second cap assembly and via of the second via assemblies. The first and second cap assemblies have a common applied thickness in an application configuration. The first and second cap assemblies have a thickness variation of ten microns or less in a reflowed configuration.