Patent · US Active

Semiconductor package structure and a method of manufacturing the same

US10854553B1 · kind B1 · utility

0Cited by

1References

20Claims

0Family size

Assignee

ADVANCED SEMICONDUCTOR ENGINEERING, INC. · TW

Inventors

Shun-Tsat TU · Kaohsiung, TW
Chunku Kuo
Ya-Tian Hou
Tsung Chieh Kuo · Beijing, CN

Key dates

Filing date	May 28, 2019
Grant date	Dec 1, 2020
Priority date	—
Expiry date	May 28, 2039

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/1532
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor package structure includes a substrate having a patterned surface, the patterned surface including a first region and a second region, wherein a first line width in the first region is smaller than a second line width in the second region. The semiconductor package structure further includes a first die hybrid-bonded to the first region through conductive features adapted for the first line width, and a second die bonded to the second region through conductive features adapted for the second line width. The manufacturing operations of the semiconductor package structure are also disclosed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.