Three-dimensional memory device containing asymmetric, different size support pillars and method for making the same
US10854629B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2019 |
| Grant date | Dec 1, 2020 |
| Priority date | — |
| Expiry date | Mar 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
Abstract
An alternating stack of insulating layers and spacer material layers is formed over a substrate. A staircase region having stepped surfaces is formed by patterning the alternating stack. Memory opening fill structures are formed in a memory array region, and support pillar structures are formed in the staircase region. Each of the memory stack structures includes a memory film and a vertical semiconductor channel. The support pillar structures include first support pillar structures and having a first maximum lateral dimension and second support pillar structures having a second maximum lateral dimension that is less than the first maximum lateral dimension and interlaced with the first support pillar structures. The sacrificial material layers are replaced with electrically conductive layers. The second support pillar structures are positioned interstitially among the first support pillar structures and contact via structures that are formed on the electrically conductive layers to provide additional structural support.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.