Elementary cell comprising a resistive random-access memory and a selector, stage and matrix of stages comprising a plurality of said cells and associated manufacturing method
US10854673B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 26, 2018 |
| Grant date | Dec 1, 2020 |
| Priority date | — |
| Expiry date | Dec 30, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/884
Abstract
An elementary cell includes a non-volatile resistive random-access memory mounted in series with a volatile selector device, the memory including an upper electrode, a lower electrode and a layer made of a first active material, designated memory active layer. The selector device includes an upper electrode, a lower electrode and a layer made of a second active material, designated selector active layer. The cell includes a one-piece conductor element including a first branch having one face in contact with the lower surface of the memory active layer in order to form the lower electrode of the memory, a second branch having one face in contact with the upper surface of the selector active layer in order to form the lower electrode of the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.