Ray tracing apparatus and method for memory access and register operations

US10861216B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Carsten Benthin · Großrosseln, DE
• Ingo Wald · Austin, US
• Gabor Liktor · San Francisco, US
• Johannes Guenther · Munich, DE
• Elmoustapha Ould-Ahmed-Vall · Chandler, US

Key dates

• Filing date: Apr 7, 2017
• Grant date: Dec 8, 2020
• Expiry date: Apr 7, 2037

Classification

• Technology area (CPC G): Physics
• CPC primary: G06T15/005
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

An apparatus and method for performing BVH compression and decompression concurrently with stores and loads, respectively. For example, one embodiment comprises: bounding volume hierarchy (BVH) construction circuitry to build a BVH based on a set of input primitives, the BVH comprising a plurality of uncompressed coordinates; traversal/intersection circuitry to traverse one or more rays through the BVH and determine intersections with the set of input primitives using the uncompressed coordinates; store with compression circuitry to compress the BVH including the plurality of uncompressed coordinates to generate a compressed BVH with compressed coordinates and to store the compressed BVH to a memory subsystem; and load with decompression circuitry to decompress the BVH including the compressed coordinates to generate a decompressed BVH with the uncompressed coordinates and to load the decompressed BVH with uncompressed coordinates to a cache and/or a set of registers accessible by the traversal/intersection circuitry.