Locked loop circuit with reference signal provided by un-trimmed oscillator
US10862487B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2019 |
| Grant date | Dec 8, 2020 |
| Priority date | — |
| Expiry date | Nov 5, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/085
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit includes a frequency detector generating a comparison signal as a function of a comparison between a reference signal and a feedback signal. An oscillator generates an output signal as a function of the comparison signal. A frequency divider, in operation, divides the output signal by a division value to produce the feedback signal as having a frequency that is a multiple of a frequency of the reference signal. A frequency counter circuit measures the frequency of the reference signal and generates a count signal based thereupon. A control circuit adjusts the division value used by the frequency divider, in operation, based upon the count signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.