Analog-test-bus apparatuses involving calibration of comparator circuits and methods thereof
US10866277B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2018 |
| Grant date | Dec 15, 2020 |
| Priority date | — |
| Expiry date | Feb 7, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/45179
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An example analog-test-bus (ATB) apparatus includes a plurality of comparator circuits, each having an output port, and a pair of input ports of opposing polarity including an inverting port and a non-inverting port, a plurality of circuit nodes to be selectively connected to the input ports of a first polarity, and at least one digital-to-analog converter (DAC) to drive the input ports of the plurality of comparator circuits. The apparatus further includes data storage and logic circuitry that accounts for inaccuracies attributable to the plurality of comparator circuits by providing, for each comparator circuit, a set of calibration data indicative of the inaccuracies for adjusting comparison operations performed by the plurality of comparator circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.