Memory aware reordered source
US10866902B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2016 |
| Grant date | Dec 15, 2020 |
| Priority date | — |
| Expiry date | Dec 28, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/302
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Processor, apparatus, and method for reordering a stream of memory access requests to establish locality are described herein. One embodiment of a method includes: storing in a request queue memory access requests generated by a plurality of execution units, the memory access requests comprising a first request to access a first memory page in a memory and a second request to access a second memory page in the memory; maintaining a list of unique memory pages, each unique memory page associated with one or more memory access requests stored the request queue and is to be accessed by the one or more memory access requests; selecting a current memory page from the list of unique memory pages; and dispatching from the request queue to the memory, all memory access requests associated with the current memory page before any other memory access request in the request queue is dispatched.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.