Sense amplifier for flash memory devices
US10867664B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2019 |
| Grant date | Dec 15, 2020 |
| Priority date | — |
| Expiry date | Dec 12, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sense amplifier includes a sense circuit coupled to a bitline and a sense node, a charge circuit coupled to the sense node and the sense circuit, a first current control transistor, an inverter circuit having a first latch node and a second latch node, coupled to the first current control transistor, and an input circuit coupled to the first latch node, the second latch node and the sense node. The first current control transistor includes a first terminal coupled to the system voltage source, a second terminal coupled to the inverter circuit, and a control terminal configured to receive a current control signal. The first current control transistor is a P-type transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.