Semiconductor structure with tapered conductor
US10867921B2 · kind B2 · utility
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22References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 24, 2019 |
| Grant date | Dec 15, 2020 |
| Priority date | — |
| Expiry date | May 24, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53295
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes an etching stop layer over an inter-layer dielectric (ILD) layer; a low-k dielectric layer over the etching stop layer; and a tapered conductor extending through the low-k dielectric layer and the etching stop layer and partially through the ILD layer; wherein the tapered conductor includes a recess disposed within the ILD layer and indented towards the etching stop layer and the low-k dielectric layer, and a protrusion surrounding the recess and protruded from the etching stop layer towards the ILD layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.