Vertical power devices with oxygen inserted Si-layers

US10868172B2 · kind B2 · utility

Assignee

• Infineon Technologies Austria AG · AT

Inventors

• Oliver Blank · Villach, AT
• Thomas Feil · Villach, AT
• Maximilian Roesch · Villach, AT
• Martin Poelzl · Ossiach, AT
• Robert Haase · Rancho Palos Verdes, US
• Sylvain Leomant · Pörtschach am Wörther See, AT
• Bernhard Goller · Villach, AT
• Andreas Meiser · Unterhaching, DE

Key dates

• Filing date: Dec 18, 2019
• Grant date: Dec 15, 2020
• Expiry date: Dec 18, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/117
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor device includes: a gate trench extending into a Si substrate; a body region in the Si substrate, the body region including a vertical channel region adjacent a sidewall of the gate trench; a source region in the Si substrate above the body region; a contact trench extending into the Si substrate and separated from the gate trench by a portion of the source region and by a portion of the body region; an electrically conductive material in the contact trench; and a diffusion barrier structure interposed between a sidewall of the contact trench and the vertical channel region, the diffusion barrier structure including alternating layers of Si and oxygen-doped Si and configured to increase carrier mobility within the vertical channel region. Corresponding methods of manufacture are also described.