In-system structural testing of a system-on-chip (SoC) using a peripheral interface port
US10877088B2 · kind B2 · utility
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17Claims
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Key dates
| Filing date | Jan 30, 2019 |
| Grant date | Dec 29, 2020 |
| Priority date | — |
| Expiry date | Jan 30, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0042
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method of in-system structural testing of a system-on-chip (SoC) using a peripheral interface port is described. The method including enabling a scan interface controller of the SoC through the peripheral interface port. The method also includes streaming structural test patterns in the SoC through the scan interface controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.