Patent · US Active

In-system structural testing of a system-on-chip (SoC) using a peripheral interface port

US10877088B2 · kind B2 · utility

0Cited by
0References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 30, 2019
Grant dateDec 29, 2020
Priority date
Expiry dateJan 30, 2039

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2213/0042
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A method of in-system structural testing of a system-on-chip (SoC) using a peripheral interface port is described. The method including enabling a scan interface controller of the SoC through the peripheral interface port. The method also includes streaming structural test patterns in the SoC through the scan interface controller.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.