Punit Kishore
7Patents
1h-index
11Co-inventors
44Inventor score
Filing activity: Nov 24, 2008 → Dec 14, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10656203B1 | Low pin count test controller | Emerging Cross-Sectional Technologies | 4 | Active |
| US10996267B2 | Time interleaved scan system | Physics | 1 | Active |
| US8726205B1 | Optimized simulation technique for design verification of an electronic circuit | Physics | 1 | Active |
| US11237587B1 | On-chip clock controller (OCC) manager based turbo capture clocking | Physics | 1 | Active |
| US8943457B2 | Simulating scan tests with reduced resources | Physics | 1 | Active |
| US10877088B2 | In-system structural testing of a system-on-chip (SoC) using a peripheral interface port | Physics | 0 | Active |
| US10241148B2 | Virtual access of input/output (I/O) for test via an on-chip star network | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.