Self-organized snapping for repeater planning
US10878166B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2019 |
| Grant date | Dec 29, 2020 |
| Priority date | — |
| Expiry date | Oct 7, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques and systems for inserting repeaters in an integrated circuit (IC) design are described. Some embodiments can place a snapping region in the IC design, wherein the snapping region includes a predetermined arrangement of feasible grid regions and blocked grid regions, and wherein repeaters are allowed to be placed in feasible grid regions but not in blocked grid regions. Next, the embodiments can iteratively perform a set of operations, comprising: selecting a net from a set of nets; determining an initial location for inserting a repeater in the net; identifying an unoccupied feasible grid region in the first snapping region that is closest to the initial location; and inserting a repeater in the net in the unoccupied feasible grid region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.