Split conductive pad for device terminal
US10879158B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 29, 2019 |
| Grant date | Dec 29, 2020 |
| Priority date | — |
| Expiry date | May 29, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Certain aspects of the present disclosure generally relate to a chip package having a split conductive pad for coupling to a device terminal. An example chip package generally includes a layer, a first plurality of conductive pads disposed on the layer, at least one conductive trace disposed on the layer and between the first plurality of conductive pads, and an electrical component having a first terminal coupled to the first plurality of conductive pads and disposed above the at least one conductive trace.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.