Semiconductor package and method of manufacturing semiconductor package
US10879225B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 4, 2019 |
| Grant date | Dec 29, 2020 |
| Priority date | — |
| Expiry date | Jun 4, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a package substrate, a first semiconductor device arranged on the package substrate, at least one second semiconductor device on the first semiconductor device to partially cover the first semiconductor device from a top down view, a heat dissipating insulation layer coated on the first semiconductor device and the at least one second semiconductor device, a conductive heat dissipation structure arranged on the heat dissipating insulation layer on a portion of the first semiconductor device not covered by the second semiconductor device, and a molding layer on the package substrate to cover the first semiconductor device and the at least one second semiconductor device. The heat dissipating insulation layer is formed of an electrically insulating and thermally conductive material, and the conductive heat dissipation structure formed of an electrically and thermally conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.