Silicon carbide epitaxial wafer having a thick silicon carbide layer with small wrapage and manufacturing method thereof
US10879359B2 · kind B2 · utility
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17Claims
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Key dates
| Filing date | Feb 20, 2019 |
| Grant date | Dec 29, 2020 |
| Priority date | — |
| Expiry date | Feb 20, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02661
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A silicon carbide epitaxial wafer (10) of the present invention is a silicon carbide epitaxial wafer including: a silicon carbide substrate (1) and a silicon carbide layer (2) provided on a first principal plane (1A) of the silicon carbide substrate (1) and having a film thickness of 100 μm or more, wherein a warpage amount of the silicon carbide epitaxial wafer is −20 μm or more and 20 μm or less.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.