Methods of fabricating semiconductor devices having gate structure with bent sidewalls
US10879393B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2018 |
| Grant date | Dec 29, 2020 |
| Priority date | — |
| Expiry date | Jan 4, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device includes forming a dummy gate structure on a substrate, forming gate spacers on sidewalls of the dummy gate structure, and depositing an interlayer dielectric layer around the gate spacers. The method also includes removing the dummy gate structure to form a space between the gate spacers, and forming a gate structure in the space, wherein the gate structure includes a gate dielectric layer and a gate electrode layer over the gate dielectric layer. The method further includes removing a portion of the gate electrode layer to form a recess that is surrounded by the gate dielectric layer. In addition, the method includes implanting on the interlayer dielectric layer to form a strained layer for bending the gate dielectric layer and the gate spacers towards the recess.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.