Systems and methods for improved through-silicon-vias
US10886195B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 18, 2016 |
| Grant date | Jan 5, 2021 |
| Priority date | — |
| Expiry date | Aug 18, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06544
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure is described. The semiconductor structure includes a semiconductor substrate and a through-silicon via (TSV). The TSV is disposed between a first surface of the semiconductor substrate and an interconnection layer disposed on a second surface of the semiconductor substrate, where the first surface of the semiconductor substrate is opposite to the second surface. The TSV has an external surface that interfaces with the semiconductor substrate. In one embodiment, the external surface includes a protrusion that extends into the semiconductor substrate. In another embodiment, the TSV includes one or more voids. In yet another embodiment, the TSV includes both protrusions and voids. The protrusions and/or the one or more voids may reduce thermal expansion stress. Other embodiments may be described and/or claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.