Hardware-software design flow for heterogeneous and programmable devices
US10891414B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2019 |
| Grant date | Jan 12, 2021 |
| Priority date | — |
| Expiry date | May 23, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/343
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
For an application specifying a software portion for implementation within a data processing engine (DPE) array of a device and a hardware portion for implementation within programmable logic (PL) of the device, a logical architecture for the application and a first interface solution specifying a mapping of logical resources to hardware of an interface circuit block between the DPE array and the programmable logic are generated. A block diagram of the hardware portion is built based on the logical architecture and the first interface solution. An implementation flow is performed on the block diagram. The software portion of the application is compiled for implementation in one or more DPEs of the DPE array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.