Precise verification of a logic problem on a simulation accelerator

US10896273B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• John A. Schumann · Austin, US
• Debapriya Chatterjee · Austin, US
• Bryant Cockcroft · Austin, US
• Kevin Barnett · Austin, US
• Piriya K. Hall · Austin, US
• Paul Umbarger · Austin, US
• Karen Yokum · Austin, US

Key dates

• Filing date: Oct 12, 2018
• Grant date: Jan 19, 2021
• Expiry date: Mar 16, 2039

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/3177
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A computer system includes a hardware accelerator and host processor. The hardware accelerator executes a simulation of a first logical model according to a plurality of simulation cycles. The host processor determines a fault checkpoint based on a logic fault that occurs in response to executing the simulation. The host processor verifies removal of the logic fault based on rerunning the simulation from the fault checkpoint.