Repository of integration description of hardware intellectual property for NoC construction and SoC integration
US10896476B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2018 |
| Grant date | Jan 19, 2021 |
| Priority date | — |
| Expiry date | Aug 31, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F16/13
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and example implementations described herein are generally directed to repository of integration description of hardware intellectual property (IP) for NoC construction and SoC integration. An aspect of the present disclosure relates to a method for managing a repository of hardware intellectual property (IP) for Network-on-Chip (NoC)/System-on-Chip (SoC) construction. The method includes the steps of storing one or more integration descriptions of the hardware IP in the repository, selecting at least one integration description as a parsed selection from said one or more integration descriptions of the hardware IP for incorporation in the NoC/SoC, and generating the NoC/SoC at least from the parsed selection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.