Retrograde transistor doping by heterojunction materials

US10896907B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Patrick H. Keys · Portland, US
• Hei Kam · Sunnyvale, US
• Rishabh Mehandru · Portland, US
• Aaron A. Budrevich · Portland, US

Key dates

• Filing date: Sep 30, 2016
• Grant date: Jan 19, 2021
• Expiry date: Sep 30, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/85

Abstract

A transistor including a gate stack and source and drain on opposing sides of the gate stack; and a first material and a second material on the substrate, the first material disposed between the substrate and the second material and the channel of the transistor is defined in the second material between the source and drain, wherein the first material and the second material each include an implant and the implant includes a greater solubility in the first material than in the second material. A method for forming an integrated circuit structure including forming a first material on a substrate; forming a second material on the first material; introducing an implant into the second material, wherein the implant includes a greater solubility in the first material than in the second material; annealing the substrate; and forming a transistor on the substrate, the transistor including a channel including the second material.