Efficient inclusive cache management

US10901902B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Chad G. Wilson · Palo Alto, US
• Robert J. Sonnelitter, III · Wappingers Falls, US
• Tim Bronson · Round Rock, US
• Ekaterina M. Ambroladze · Los Angeles, US
• Hieu T. Huynh · Austin, US
• Jason D. Kohl · Austin, US
• Chakrapani Rayadurgam · Savanuru, IN

Key dates

• Filing date: Mar 21, 2019
• Grant date: Jan 26, 2021
• Expiry date: Apr 18, 2039

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2212/60
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Methods and systems for cache management are provided. Aspects include providing a drawer including a plurality of clusters, each of the plurality of clusters including a plurality of processor each having one or more cores, wherein each of the one or more cores shares a first cache memory, providing a second cache memory shared among the plurality of clusters, and receiving a cache line request from one of the one or more cores to the first cache memory, wherein the first cache memory sends a request to a memory controller to retrieve the cache line from a memory, store the cache line in the first cache memory, create a directory state associated with the cache line, and provide the directory state to the second cache memory to create a directory entry for the cache line.