Tim Bronson
7Patents
2h-index
18Co-inventors
40Inventor score
Filing activity: Jun 14, 2012 → Apr 10, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10915461B2 | Multilevel cache eviction management | Physics | 2 | Active |
| US10802966B2 | Simultaneous, non-atomic request processing within an SMP environment broadcast scope for multiply-requested data elements using real-time parallelization | Physics | 2 | Active |
| US9003125B2 | Cache coherency protocol for allowing parallel data fetches and eviction to the same addressable index | Physics | 1 | Active |
| US11048427B2 | Evacuation of memory from a drawer in a live multi-node system | Physics | 0 | Active |
| US11221794B2 | Memory array element sparing | Physics | 0 | Active |
| US10831661B2 | Coherent cache with simultaneous data requests in same addressable index | Physics | 0 | Active |
| US10901902B2 | Efficient inclusive cache management | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.