Electronic package, packaging substrate, and methods for fabricating the same
US10903167B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2019 |
| Grant date | Jan 26, 2021 |
| Priority date | — |
| Expiry date | Apr 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18161
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic package, a packaging substrate, and methods for fabricating the same are disposed. The electronic package includes a circuit structure having a first side and a second side opposing the first side, an electronic component disposed on the first side of the circuit structure, an encapsulation layer formed on the first side of the circuit structure and encapsulating the electronic component, a metal structure disposed on the second side of the circuit structure, and a plurality of conductive elements disposed on the metal structure. The plurality of conductive elements are disposed on the metal structure, rather than disposed on the circuit structure directly. Therefore, the bonding between the conductive elements and the circuit structure is improved, to avoid the plurality of conductive elements from being peeled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.