Laterally diffused metal oxide semiconductor (LDMOS) transistor on a semiconductor on insulator (SOI) layer with a backside device
US10903357B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 2018 |
| Grant date | Jan 26, 2021 |
| Priority date | — |
| Expiry date | Oct 4, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/38
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An integrated circuit is described. The integrated circuit includes a laterally diffused metal oxide semiconductor (LDMOS) transistor. The LDMOS is on a first surface of an insulator layer of the integrated circuit. The LDMOS transistor includes a source region, a drain region, and a gate. The LDMOS transistor also includes a secondary well between the drain region and the gate. The secondary well has an opposite polarity from the drain region. The LDMOS transistor further includes a backside device on a second surface opposite the first surface of the insulator layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.