Apparatus and methods for high frequency clock generation
US10903841B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 3, 2020 |
| Grant date | Jan 26, 2021 |
| Priority date | — |
| Expiry date | Apr 3, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/24
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Described are apparatus and methods for high frequency clock generation. A circuit includes a phase frequency detector (PFD) which outputs differential error clocks based on comparison of differential reference clocks and differential feedback clocks, which are at a first frequency. A controlled oscillator (CO) connected to the PFD, which adjusts a frequency of the CO based on the differential error clocks to generate differential clocks at a second frequency, which is a multiple of the first frequency. A quadrature clock generator connected to the CO, which generates differential quadrature clocks at the second frequency from the differential clocks, where the differential feedback clocks are generated from the differential clocks and one pair of the differential quadrature clocks. A frequency doubler which doubles each pair of the differential quadrature clocks and outputs fully differential and balanced clocks at a third frequency for distribution, which is a multiple of the second frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.