Alignment mark, imprinting method, manufacturing method of semiconductor device, and alignment device
US10908519B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 11, 2019 |
| Grant date | Feb 2, 2021 |
| Priority date | — |
| Expiry date | Sep 11, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/54426
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
In an alignment mark of an embodiment, a first pattern includes a first portion and a second portion, a second pattern includes a third portion and a fourth portion, the first portion and the third portion partially overlap each other, the second portion and the fourth portion partially overlap each other, a pitch length of each structural periods of the first portion and the third portion are equal within 1.2 times, a pitch length of each structural periods of the second portion and the fourth portion are equal within 1.2 times, a duty ratio of each of the first and third portions is 1:1, and a duty ratio of the second portion is D:2, and D is an integer of two or more, the duty ratio being a ratio between a light-shielding portion and a light-transmitting portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.