Method for manufacturing semiconductor device
US10910260B2 · kind B2 · utility
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1References
20Claims
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Key dates
| Filing date | Oct 25, 2019 |
| Grant date | Feb 2, 2021 |
| Priority date | — |
| Expiry date | Oct 25, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76802
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a semiconductor device includes forming a structure protruding from a substrate, forming a dielectric layer covering the structure, forming a dummy layer covering the dielectric layer, and performing a planarization process to completely remove the dummy layer. A material of the dummy layer has a slower removal rate to the planarization process than a material of the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.