Alignment marks in substrate having through-substrate via (TSV)
US10910267B2 · kind B2 · utility
0Cited by
43References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2020 |
| Grant date | Feb 2, 2021 |
| Priority date | — |
| Expiry date | Jun 22, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A device includes a substrate, and an alignment mark including a conductive through-substrate via (TSV) penetrating through the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.