Self-tuning zero current detection circuit
US10910946B2 · kind B2 · utility
1Cited by
4References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 27, 2018 |
| Grant date | Feb 2, 2021 |
| Priority date | — |
| Expiry date | Sep 27, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An apparatus has a comparator circuitry (e.g., auto-zero comparator) with a first input, a second input, a third input; and an output; a first device (e.g., a low-side switch) coupled to the first and second inputs of the comparator; and a circuitry (e.g., a self-tuning logic) to generate a digital code which represents a comparator offset adjustment with reference to detection of current through a second device (e.g., an inductor), wherein the digital code (e.g., a multibit digital signal) is provided to the third input of the comparator circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.