Patent · US Active

Raising maximal silicon die temperature using reliability model

US10915154B1 · kind B1 · utility

0Cited by
7References
35Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 8, 2019
Grant dateFeb 9, 2021
Priority date
Expiry dateAug 26, 2039

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG05B13/042
  • WIPO fieldControl
  • WIPO sectorInstruments

Abstract

A method includes obtaining (i) an operating-temperature profile of a hardware processing sub-unit (HPSU) of a network element as a function of time, and (ii) a dependence of an Equivalent Reliability Time (ERT) of the HPSU on operating temperature. The operating-temperature profile is weighted using the dependence of the ERT on operating temperature, to estimate an effective ERT of the HPSU. An operating condition of the HPSU in the network element is modified, depending on the effective ERT.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.