Write driver and pre-charge circuitry for high performance pseudo-dual port (PDP) memories
US10916275B1 · kind B1 · utility
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20Claims
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Key dates
| Filing date | Jan 6, 2020 |
| Grant date | Feb 9, 2021 |
| Priority date | — |
| Expiry date | Jan 6, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for operating a pseudo-dual port (PDP) memory is described. The method includes pre-charging bitline pairs BL and BLB coupled to unselected columns of the PDP memory according to a write operation during a pre-charge operation after a read operation of the PDP memory. The method also includes concurrently pulling-down a bitline pair BL and BLB coupled to a selected column of PDP memory according to the write operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.