Inventor · San Diego, CA, US

Sonia Ghosh

12Patents
3h-index
13Co-inventors
53Inventor score

Filing activity: Jul 30, 2010 → Sep 30, 2020

Most-cited inventions

PatentTitleAreaCited byStatus
US9685210B1 Overlapping precharge and data write Physics 26 Active
US10916275B1 Write driver and pre-charge circuitry for high performance pseudo-dual port (PDP) memories Physics 8 Active
US9858988B1 Timing circuit for memories Physics 6 Active
US11092646B1 Determining a voltage and/or frequency for a performance mode Physics 1 Active
US9263349B2 Printing minimum width semiconductor features at non-minimum pitch and resulting device Emerging Cross-Sectional Technologies 0 Active
US11222846B1 Static random access memory (SRAM) bit cells employing asymmetric width read and write word lines, and related methods General 0 Revoked
US8238187B2 Fast cyclic decoder circuit for FIFO/LIFO data buffer Physics 0 Active
US9564375B2 Structures and methods for extraction of device channel width Physics 0 Active
US9905316B2 Efficient sense amplifier shifting for memory redundancy Physics 0 Active
US9484300B2 Device resulting from printing minimum width semiconductor features at non-minimum pitch Emerging Cross-Sectional Technologies 0 Active
US11251123B1 Static random access memory (SRAM) bit cells employing asymmetric width read and write word lines, and related methods Electricity 0 Active
US11289495B1 Static random access memory (SRAM) bit cell circuits with a minimum distance between a storage circuit active region and a read port circuit active region to reduce area and SRAM bit cell array circuits Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.