Pre-processing method, method for forming metal silicide and semiconductor processing apparatus
US10916417B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2020 |
| Grant date | Feb 9, 2021 |
| Priority date | — |
| Expiry date | Jun 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67213
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A pre-processing method, a method for forming a metal silicide and a semiconductor processing apparatus are disclosed by the present invention. In the pre-processing method, a plasma etching process is performed on a semiconductor structure including a substrate. A first conductive portion and an isolation spacer covering a side surface of the first conductive portion are formed on a surface of an active area in the substrate. In the plasma etching process, a bias voltage applied to a surface of the semiconductor structure is adjusted by adjusting power outputs of two RF sources and is not lower than 150 V. In the metal silicide formation method, after a semiconductor structure including a first conductive portion and a second conductive portion is pre-processed in the manner as described above, a metal film is deposited thereon and annealed to result in the formation of the metal silicide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.