NEXCHIP SEMICONDUCTOR CORPORATION
23Patents
23Active
23Granted
46Portfolio score
Filing activity: Aug 31, 2018 → Jul 19, 2021
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11069559B1 | Semiconductor structure and method of forming same | Electricity | 2 | Active |
| US10490647B1 | Method of forming metal silicide layer, semiconductor device and method of fabricating same | Electricity | 1 | Active |
| US11024722B1 | Diffused field-effect transistor and method of fabricating same | Electricity | 1 | Active |
| US11901217B2 | Method and apparatus for making shallow trench structure | Electricity | 0 | Active |
| US11049947B2 | Non-volatile memory and manufacturing method for the same | Electricity | 0 | Active |
| US11398411B2 | Method for manufacturing semiconductor element | Electricity | 0 | Active |
| US10726894B2 | Non-volatile memory cell, array and fabrication method | Physics | 0 | Active |
| US11437281B2 | Method for manufacturing semiconductor device and semiconductor device thereby formed | Electricity | 0 | Active |
| US11404328B2 | Semiconductor structure and manufacturing method thereof | Electricity | 0 | Active |
| US10490441B1 | Silicon island structure and method of fabricating same | Electricity | 0 | Active |
| US11876001B2 | Method and system for manufacturing semiconductor layer | Electricity | 0 | Active |
| US10916417B2 | Pre-processing method, method for forming metal silicide and semiconductor processing apparatus | Electricity | 0 | Active |
| US10957776B2 | Method of fabricating MOSFET | Electricity | 0 | Active |
| US10930545B2 | Method for forming semiconductor structure | Electricity | 0 | Active |
| US12154972B2 | Diffused field-effect transistor | Electricity | 0 | Active |
| US10971595B2 | MOFSET and method of fabricating same | Electricity | 0 | Active |
| US10950601B2 | Current source using emitter region as base region isolation structure | Electricity | 0 | Active |
| US10916664B2 | Non-volatile memory and manufacturing method for the same | Electricity | 0 | Active |
| US12259661B2 | Overlay mark, overlay marking method and overlay measuring method | Electricity | 0 | Active |
| US11348781B2 | Wafer annealing method | Electricity | 0 | Active |
| US11257668B2 | Semiconductor structure and manufacturing method thereof | Electricity | 0 | Active |
| US10854758B2 | Non-volatile memory and manufacturing method for the same | Electricity | 0 | Active |
| US11088155B2 | Method for fabricating split-gate non-volatile memory | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.