Patent · US Active

3D SRAM/ROM with several superimposed layers and reconfigurable by transistor rear biasing

US10923191B2 · kind B2 · utility

0Cited by

5References

11Claims

0Family size

Assignee

COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

David Coriat · Grenoble, FR
Adam Makosiej · Grenoble, FR

Key dates

Filing date	Jul 12, 2019
Grant date	Feb 16, 2021
Priority date	—
Expiry date	Jul 12, 2039

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/419
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A 3D microelectronic device is provided with several superimposed layers of components, with an upper layer including one or several memory cells having a SRAM structure and provided with a rear biasing electrode. The biasing of the rear biasing electrode is modified to switch the memory cells from a ROM operating mode to a SRAM operating mode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.